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Thesis/Dissertation Seminars

Thesis Defense: Energy-Aware Reconfigurable Logic Devices Using Spin-Based Storage and Carbon Nanotube Switching

HEC 450
March 29, 2016 @ 04:30 PM - 06:30 PM

Announcing the Final Examination of Mohan Krishna Gopi Krishna for the degree of Master of Science

Scaling of semiconductors below nanometer range introduces serious design challenges that include high static power in memories and high leakage power, hindering further integration of CMOS devices. Thus, emerging devices are under intense analysis to overcome these drawbacks caused by transistor size scaling. Spintronics technology provides excellent features such as Non-Volatility, low read power, low read delay, higher scalability as well as easy integration with CMOS in comparison with SRAM memories. In addition, Carbon-Nanotube Field-Effect Transistors (CNFETs) provide superior electrical conductivity, low delay and low power consumption in comparison with conventional CMOS technology. Thus in this thesis, a unique approach to amalgamate spintronics memory technology with CNFET for logic drive in a reconfigurable computing architecture, to realizing ultimate circuit performance has been discussed.

A Carbon Magnetic Look-Up Table (CM-LUT) is proposed, using a Magnetic Tunnel Junction (MTJ) spintronic device as memory element and CNFET to perform the logical operations to read the data stored in the aforementioned devices. The proposed circuit is radiation resilient, ultra-low power and high speed operation and the ability to withstand high temperature gradient, Ideal for low power high performance battery operated mobile applications. In addition, the performance of hybrid drive for LUT to leverage fabrication feasibility of CMOS and performance of CNFET to realize fabrication cost effective design. The proposed 4-input 1-output CM-LUT utilizes 41 CNFETs and 16 MTJs for read operation and 35 CNFETs to perform write operation. The results for CM-LUT show 38 times energy reduction and 5.8 times faster circuit operation in comparison with CMOS-based spin-LUT.

Committee in Charge: Ronald F. DeMara (Chair), Enrique Del Barco, Jiann Yuan